initial commit: elecrow board

boards/xtensa/elecrow_esp_terminal/Kconfig

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+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0

boards/xtensa/elecrow_esp_terminal/Kconfig.board

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+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0
+
+# Elecrow ESP Terminal board configuration
+config BOARD_ELECROW_ESP_TERMINAL
+	bool "Elecrow ESP Terminal Board"
+	depends on SOC_SERIES_ESP32S3
+
+config BOARD_ELECROW_ESP_TERMINAL_APPCPU
+	bool "ESP32S3 Board configuration for APPCPU (core 1)."
+	depends on SOC_SERIES_ESP32S3 && SOC_ESP32S3_APPCPU
+
+choice SOC_PART_NUMBER
+	default SOC_ESP32S3_WROOM_N16R8
+endchoice

boards/xtensa/elecrow_esp_terminal/Kconfig.defconfig

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+# Elecrow ESP Terminal board configuration
+
+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_ELECROW_ESP_TERMINAL
+
+config BOARD
+	default "elecrow_esp_terminal"
+
+config HEAP_MEM_POOL_ADD_SIZE_BOARD
+	int
+	default 98304 if WIFI
+	default 40960 if BT
+	default 4096
+
+choice BT_HCI_BUS_TYPE
+	default BT_ESP32 if BT
+endchoice
+
+config ENTROPY_GENERATOR
+	default y
+
+config INPUT
+	default y
+
+config DISPLAY
+	default y
+
+config VIDEO
+	default y
+
+config DISK_ACCESS
+	default y
+
+config DISK_DRIVER_SDMMC
+	default y if DISK_ACCESS
+
+config SPI
+	default y if DISK_DRIVER_SDMMC || DISPLAY
+
+config I2C
+		default y if INPUT
+
+config INPUT_FT5336
+		default y if INPUT
+
+config INPUT_FT5336_INTERRUPT
+	default y if INPUT
+
+config ILI9488
+	default y if DISPLAY
+
+config REGULATOR
+	default y if DISPLAY
+
+config VIDEO_OV2640
+	default y if VIDEO
+
+if DISPLAY && LVGL
+
+config LV_Z_BITS_PER_PIXEL
+	default 32
+
+config LV_Z_MEM_POOL_SIZE
+	default 16384
+
+config LV_Z_VDB_SIZE
+	default 20
+
+endif # DISPLAY && LVGL
+
+endif # BOARD_ELECROW_ESP_TERMINAL
+
+if BOARD_ELECROW_ESP_TERMINAL_APPCPU
+
+config BOARD
+	default "elecrow_esp_terminal_appcpu"
+
+config HEAP_MEM_POOL_ADD_SIZE_BOARD
+	def_int 4096
+
+config KERNEL_BIN_NAME
+	default "esp32_net_firmware"
+
+endif # BOARD_ELECROW_ESP_TERMINAL_APPCPU

boards/xtensa/elecrow_esp_terminal/Kconfig.sysbuild

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+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0
+
+choice BOOTLOADER
+	default BOOTLOADER_MCUBOOT
+endchoice
+
+choice BOOT_SIGNATURE_TYPE
+	default BOOT_SIGNATURE_TYPE_NONE
+endchoice

boards/xtensa/elecrow_esp_terminal/board.cmake

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+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0
+
+if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
+  set(OPENOCD OPENOCD-NOTFOUND)
+endif()
+find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
+
+include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/xtensa/elecrow_esp_terminal/doc/index.rst

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+.. _elecrow_esp_terminal:
+
+Elecrow ESP Terminal
+####################
+
+Overview
+********
+
+The Elecrow ESP Terminal is a display device built on the ESP32S3-WROOM 1 N16R8. This board integrates complete Wi-Fi
+and Bluetooth Low Energy functions. For more information, check `Elecrow ESP Terminal`_
+
+Hardware
+********
+
+ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi
+and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
+(Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband,
+RF module, and numerous peripherals.
+
+Elecrow ESP Terminal includes the following features:
+
+- Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz
+- Additional vector instructions support for AI acceleration
+- 512KB of SRAM
+- 384KB of ROM
+- Wi-Fi 802.11b/g/n
+- Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate
+
+Digital interfaces:
+
+- OV2640 camera on I2C0 + GPIOs
+- microSD on SPI2
+- 480x320 RGB666 display with ILI9488 on SPI2
+- Buzzer on GPIO (passive)
+- I2S MEMS microphone on SPIM3
+- 2x external GPIOs with 5V level shifters
+
+Analog interfaces:
+
+- 2x external analog inputs (shared with USB-JTAG/serial D+/D-)
+
+
+Additional information from ESP32 HAL
+#####################################
+
+
+Prerequisites
+-------------
+
+Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
+below to retrieve those files.
+
+.. code-block:: console
+
+   west blobs fetch hal_espressif
+
+.. note::
+
+   It is recommended running the command above after :file:`west update`.
+
+Building & Flashing
+*******************
+
+ESP-IDF bootloader
+==================
+
+The board is using the ESP-IDF bootloader as the default 2nd stage bootloader.
+It is build as a subproject at each application build. No further attention
+is expected from the user.
+
+MCUboot bootloader
+==================
+
+User may choose to use MCUboot bootloader instead. In that case the bootloader
+must be build (and flash) at least once.
+
+There are two options to be used when building an application:
+
+1. Sysbuild
+2. Manual build
+
+.. note::
+
+   User can select the MCUboot bootloader by adding the following line
+   to the board default configuration file.
+   ```
+   CONFIG_BOOTLOADER_MCUBOOT=y
+   ```
+
+Sysbuild
+========
+
+The sysbuild makes possible to build and flash all necessary images needed to
+bootstrap the board with the ESP32 SoC.
+
+To build the sample application using sysbuild use the command:
+
+.. zephyr-app-commands::
+   :tool: west
+   :app: samples/hello_world
+   :board: elecrow_esp_terminal
+   :goals: build
+   :west-args: --sysbuild
+   :compact:
+
+By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
+images. But it can be configured to create other kind of images.
+
+Build directory structure created by sysbuild is different from traditional
+Zephyr build. Output is structured by the domain subdirectories:
+
+.. code-block::
+
+  build/
+  ├── hello_world
+  │   └── zephyr
+  │       ├── zephyr.elf
+  │       └── zephyr.bin
+  ├── mcuboot
+  │    └── zephyr
+  │       ├── zephyr.elf
+  │       └── zephyr.bin
+  └── domains.yaml
+
+.. note::
+
+   With ``--sysbuild`` option the bootloader will be re-build and re-flash
+   every time the pristine build is used.
+
+For more information about the system build please read the :ref:`sysbuild` documentation.
+
+Manual build
+============
+
+During the development cycle, it is intended to build & flash as quickly possible.
+For that reason, images can be build one at a time using traditional build.
+
+The instructions following are relevant for both manual build and sysbuild.
+The only difference is the structure of the build directory.
+
+.. note::
+
+   Remember that bootloader (MCUboot) needs to be flash at least once.
+
+Build and flash applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: elecrow_esp_terminal
+   :goals: build
+
+The usual ``flash`` target will work with the ``elecrow_esp_terminal`` board
+configuration. Here is an example for the :ref:`hello_world`
+application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: elecrow_esp_terminal
+   :goals: flash
+
+Open the serial monitor using the following command:
+
+.. code-block:: shell
+
+   west espressif monitor
+
+After the board has automatically reset and booted, you should see the following
+message in the monitor:
+
+.. code-block:: console
+
+   ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
+   Hello World! elecrow_esp_terminal
+
+Debugging
+*********
+
+ESP32-S3 support on OpenOCD is available upstream as of version 0.12.0.
+Download and install OpenOCD from `OpenOCD`_.
+
+ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary.
+
+Further documentation can be obtained from the SoC vendor in `JTAG debugging
+for ESP32-S3`_.
+
+Here is an example for building the :ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: elecrow_esp_terminal
+   :goals: build flash
+
+You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: elecrow_esp_terminal
+   :goals: debug
+
+.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/
+.. _`OpenOCD`: https://github.com/openocd-org/openocd
+.. _`Elecrow ESP Terminal`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitm-1.html
+
+References
+**********
+
+.. _Elecrow ESP Terminal User Guide: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitm-1.html
+.. _ESP32-S3 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-s3-mini-1_mini-1u_datasheet_en.pdf
+.. _ESP32 Technical Reference Manual: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal-pinctrl.dtsi

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+/*
+ # Copyright (c) 2024 PM
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <UART0_TX_GPIO43>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART0_RX_GPIO44>;
+			bias-pull-up;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <I2C0_SDA_GPIO2>,
+				 <I2C0_SCL_GPIO1>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	spim2_default: spim2_default {
+		group1 {
+			pinmux = <SPIM2_MISO_GPIO14>,
+				 <SPIM2_SCLK_GPIO12>,
+				 <SPIM2_CSEL_GPIO3>, // LCD
+				 <SPIM2_CSEL1_GPIO10>; // SD
+		};
+		group2 {
+			pinmux = <SPIM2_MOSI_GPIO13>;
+			output-low;
+		};
+	};
+
+};
+
+
+/*
+Missing: 
+    pins for camera:
+        vs=4
+        hs=5
+        mclk=7
+        pclk=17
+        d1=11
+        d2=8
+        d3=47
+        d4=48
+        d5=21
+        d6=18
+        d7=16
+        d8=15
+        d9=6
+    microphone:
+        on spim3 as i2s
+*/

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal.dts

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+/*
+ * # Copyright (c) 2024 PM
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/dts-v1/;
+
+#include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <zephyr/dt-bindings/display/ili9xxx.h>
+
+#include "elecrow_esp_terminal-pinctrl.dtsi"
+
+/ {
+	model = "elecrow_esp_terminal";
+	compatible = "espressif,esp32s3";
+
+	aliases {
+		i2c-0 = &i2c0;
+		watchdog0 = &wdt0;
+		uart-0 = &uart0;
+		sw0 = &button0;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,display = &ili9488;
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+		button0: button_0 {
+			gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "BOOT Button";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+
+	lcd_backlight_en {
+		compatible = "regulator-fixed";
+		regulator-name = "lcd_backlight_enable";
+		enable-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		regulator-boot-on;
+	};	
+
+	lvgl_pointer {
+		compatible = "zephyr,lvgl-pointer-input";
+		input = <&ft5336_touch>;
+		swap-xy;
+	};
+};
+
+&cpu0 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&cpu1 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&usb_serial {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	ft5336_touch: ft5336@38 {
+		status = "okay";
+		compatible = "focaltech,ft5336";
+		reg = <0x38>;
+		int-gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+	};
+
+	ov2640: ov2640@30 {
+		status = "okay";
+		compatible = "ovti,ov2640";
+		reg = <0x30>;
+	};
+};
+
+&spi2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	pinctrl-0 = <&spim2_default>;
+	pinctrl-names = "default";
+
+	use-iomux;
+	dma-enabled;
+
+	ili9488: ili9488@0 {
+		compatible = "ilitek,ili9488";
+		status = "okay";
+		spi-max-frequency = <40000000>;
+		reg = <0>;
+		cmd-data-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+		pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB888>; // ili9488 does NOT work with 565, only 888 (666)
+		rotation = <270>;
+		width = <480>;
+		height = <320>;
+	};
+
+	sdhc0: sdhc@1 {
+		compatible = "zephyr,sdhc-spi-slot";
+		reg = <1>;
+		status = "okay";
+		mmc {
+			compatible = "zephyr,sdmmc-disk";
+			status = "okay";
+		};
+		spi-max-frequency = <20000000>;
+	};	
+};
+
+&timer0 {
+	status = "disabled";
+};
+
+&timer1 {
+	status = "disabled";
+};
+
+&timer2 {
+	status = "disabled";
+};
+
+&timer3 {
+	status = "disabled";
+};
+
+&wdt0 {
+	status = "okay";
+};
+
+&trng0 {
+	status = "okay";
+};
+
+&usb_serial {
+	status = "disabled";
+};
+
+&flash0 {
+	status = "okay";
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Reserve 64kB for the bootloader */
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 0x00010000>;
+			read-only;
+		};
+
+		/* Reserve 1024kB for the application in slot 0 */
+		slot0_partition: partition@10000 {
+			label = "image-0";
+			reg = <0x00010000 0x00100000>;
+		};
+
+		/* Reserve 1024kB for the application in slot 1 */
+		slot1_partition: partition@110000 {
+			label = "image-1";
+			reg = <0x00110000 0x00100000>;
+		};
+
+		/* Reserve 256kB for the scratch partition */
+		scratch_partition: partition@210000 {
+			   label = "image-scratch";
+			   reg = <0x00210000 0x00040000>;
+		};
+
+		storage_partition: partition@250000 {
+			label = "storage";
+			reg = <0x00250000 0x00006000>;
+		};
+	};
+};
+
+// &psram0 {
+// 	status = "okay";
+// };

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal.yaml

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+identifier: elecrow_esp_terminal
+name: Elecrow ESP Terminal
+type: mcu
+arch: xtensa
+toolchain:
+  - zephyr
+supported:
+  - gpio
+  - uart
+  - i2c
+  - spi
+  - can
+  - counter
+  - watchdog
+  - entropy
+  - pwm
+  - dma
+  - input
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+vendor: espressif

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal_appcpu.dts

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+/*
+ * Copyright (c) 2024 PM
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/dts-v1/;
+
+#include <espressif/esp32s3/esp32s3_appcpu.dtsi>
+/ {
+	model = "esp32s3_appcpu";
+	compatible = "espressif,esp32s3_appcpu";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,ipc_shm = &shm0;
+		zephyr,ipc = &ipm0;
+	};
+};
+
+&cpu0 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&cpu1 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&trng0 {
+	status = "okay";
+};
+
+&ipm0 {
+	status = "okay";
+};

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal_appcpu.yaml

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+identifier: elecrow_esp_terminal_appcpu
+name: Elecrow ESP Terminal APPCPU
+type: mcu
+arch: xtensa
+toolchain:
+  - zephyr
+supported:
+  - uart
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+    - flash
+    - cpp
+    - posix
+    - watchdog
+    - logging
+    - kernel
+    - pm
+    - gpio
+    - crypto
+    - eeprom
+    - heap
+    - cmsis_rtos
+    - jwt
+    - zdsp

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal_appcpu_defconfig

@@ -0,0 +1,10 @@
+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_ESP32S3=y
+CONFIG_SOC_ESP32S3_APPCPU=y
+CONFIG_BOARD_ELECROW_ESP_TERMINAL_APPCPU=y
+
+CONFIG_MAIN_STACK_SIZE=2048
+CONFIG_CLOCK_CONTROL=y
+CONFIG_MINIMAL_LIBC=y

boards/xtensa/elecrow_esp_terminal/elecrow_esp_terminal_defconfig

@@ -0,0 +1,13 @@
+# Copyright (c) 2024 PM
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_BOARD_ELECROW_ESP_TERMINAL=y
+CONFIG_SOC_SERIES_ESP32S3=y
+
+CONFIG_MAIN_STACK_SIZE=8192 # increased for LVGL
+
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_GPIO=y
+CONFIG_CLOCK_CONTROL=y

boards/xtensa/elecrow_esp_terminal/support/openocd.cfg

@@ -0,0 +1,4 @@
+set ESP_RTOS none
+set ESP32_ONLYCPU 1
+
+source [find board/esp32s3-builtin.cfg]