fix bitmasks for DIO
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ba4052f7c1
commit
6d86f2127a
1 changed files with 19 additions and 21 deletions
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@ -159,7 +159,7 @@ DIO0_PM_PLLLOCK = 3
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PacketFormat_Fixed = 0
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PacketFormat_Fixed = 0
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PacketFormat_Variable = 1
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PacketFormat_Variable = 1
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class Rfm69(threading.Thread):
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class Rfm69():
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@staticmethod
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@staticmethod
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def test(cs, gpio_dio0):
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def test(cs, gpio_dio0):
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spi = spidev.SpiDev()
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spi = spidev.SpiDev()
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@ -168,13 +168,13 @@ class Rfm69(threading.Thread):
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#Testing presence of module
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#Testing presence of module
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err = False
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err = False
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for i in range(8):
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for i in range(8):
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spi.xfer2([(RegSyncValue1 + i) | 0x80, 0x55])
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spi.xfer3([(RegSyncValue1 + i) | 0x80, 0x55])
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test = spi.xfer2([(RegSyncValue1 + i), 0x00])[1]
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test = spi.xfer3([(RegSyncValue1 + i), 0x00])[1]
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if test != 0x55:
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if test != 0x55:
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err = True
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err = True
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break
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break
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temp = spi.xfer2([(RegSyncValue1 + i) | 0x80, 0xAA])
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temp = spi.xfer3([(RegSyncValue1 + i) | 0x80, 0xAA])
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test = spi.xfer2([(RegSyncValue1 + i), 0x00])[1]
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test = spi.xfer3([(RegSyncValue1 + i), 0x00])[1]
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if test != 0xAA:
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if test != 0xAA:
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err = True
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err = True
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break
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break
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@ -189,7 +189,7 @@ class Rfm69(threading.Thread):
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self.__event = threading.Event()
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self.__event = threading.Event()
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self.__spi = spidev.SpiDev()
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self.__spi = spidev.SpiDev()
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self.__spi.open(0, cs)
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self.__spi.open(0, cs)
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self.__spi.max_speed_hz=int(5E6)
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self.__spi.max_speed_hz=int(2E6)
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self.__gpio_int = gpio_int
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self.__gpio_int = gpio_int
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self.__mutex = threading.Lock()
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self.__mutex = threading.Lock()
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self.__syncsize = 4
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self.__syncsize = 4
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@ -267,18 +267,13 @@ class Rfm69(threading.Thread):
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self.__write_reg(key, config[key])
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self.__write_reg(key, config[key])
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self.mode_standby()
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self.mode_standby()
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threading.Thread.__init__(self)
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print("Init complete.", file = sys.stderr)
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print("Init complete.", file = sys.stderr)
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def run(self):
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while True:
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time.sleep(0.5)
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def __rfm_irq(self, ch):
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def __rfm_irq(self, ch):
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self.__event.set()
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self.__event.set()
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def __write_reg(self, reg, val):
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def __write_reg(self, reg, val):
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temp = self.__spi.xfer2([(reg & 0x7F) | 0x80, val & 0xFF])
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temp = self.__spi.xfer3([(reg & 0x7F) | 0x80, int(val & 0xFF)])
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def __write_reg_word(self, reg, val):
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def __write_reg_word(self, reg, val):
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self.__write_reg(reg, (val >> 8) & 0xFF)
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self.__write_reg(reg, (val >> 8) & 0xFF)
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@ -290,10 +285,13 @@ class Rfm69(threading.Thread):
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self.__write_reg(reg, temp)
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self.__write_reg(reg, temp)
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def __set_dio_mapping(self, dio, mapping):
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def __set_dio_mapping(self, dio, mapping):
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if ((dio >= 0) and (dio <=3)):
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if dio > 3:
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self.__set_reg(RegDioMapping1, 0xC0 >> (dio * 2), mapping << (6 - dio * 2))
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reg = RegDioMapping2
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elif (dio == 5):
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dio -= 3
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self.__set_reg(RegDioMapping2, 0x03 << 4, mapping << 4)
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else:
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reg = RegDioMapping1
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dio *= 2
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self.__set_reg(reg, 0xC0 >> dio, mapping << (6 - dio))
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def __set_mode(self, mode):
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def __set_mode(self, mode):
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self.__write_reg(RegOpMode, mode << 2)
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self.__write_reg(RegOpMode, mode << 2)
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@ -302,18 +300,18 @@ class Rfm69(threading.Thread):
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pass
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pass
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def read_reg(self, reg):
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def read_reg(self, reg):
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temp = self.__spi.xfer2([reg & 0x7F, 0x00])
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temp = self.__spi.xfer3([reg & 0x7F, 0x00])
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return temp[1]
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return int(temp[1])
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def read_fifo_burst(self, len):
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def read_fifo_burst(self, len):
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temp = self.__spi.xfer2([0x00] + [0x00] * len)
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temp = self.__spi.xfer3([0x00] + [0x00] * len)
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return temp[1:]
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return temp[1:]
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def write_fifo_burst(self, data):
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def write_fifo_burst(self, data):
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self.__spi.xfer2([0x80] + list(data))
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self.__spi.xfer3([0x80] + list(data))
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def read_reg_word(self, reg):
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def read_reg_word(self, reg):
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temp = self.__spi.xfer2([reg & 0x7F, 0x00, 0x00])
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temp = self.__spi.xfer3([reg & 0x7F, 0x00, 0x00])
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return (temp[1] << 8) | (temp[2])
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return (temp[1] << 8) | (temp[2])
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def read_rssi_value(self):
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def read_rssi_value(self):
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