fix LNAGain setting
fix sending bytearray fix autorxrestart add option OokPeakThreshDec
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parent
a3a7e60403
commit
b3f24766b0
1 changed files with 10 additions and 12 deletions
22
rfm69.py
22
rfm69.py
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@ -251,11 +251,10 @@ class Rfm69(threading.Thread):
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config[RegTemp1] = 0x01
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config[RegTemp2] = 0x00
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config[RegTestLna] = 0x1B
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config[RegTestDagc] = 0x30
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config[RegTestDagc] = 0x30 #low beta 0
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config[RegTestAfc] = 0x00
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config[RegPacketConfig1] = 0x00 #Fixed length, CRC off, no adr
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config[RegPacketConfig2] = 0 #1<<AutoRxRestartOn
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for key in config:
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self.__WriteReg(key, config[key])
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@ -304,17 +303,13 @@ class Rfm69(threading.Thread):
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return temp[1:]
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def WriteFifoBurst(self, data):
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self.__spi.xfer2([0x80] + data)
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self.__spi.xfer2([0x80] + list(data))
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def ReadRegWord(self, reg):
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temp = self.__spi.xfer2([reg & 0x7F, 0x00, 0x00])
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return (temp[1] << 8) | (temp[2])
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def ReadRssiValue(self):
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self.__WriteReg(RegRssiConfig, 1<<0)
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r = self.ReadReg(RegRssiConfig)
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while ((r & (1<<1)) == 0):
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r = self.ReadReg(RegRssiConfig)
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return self.ReadReg(RegRssiValue)
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def ModeStandBy(self):
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@ -387,7 +382,7 @@ class Rfm69(threading.Thread):
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self.__WriteRegWord(RegPreambleMsb, value)
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elif key == "LnaGain":
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self.__SetReg(RegLna, 0x03, value)
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self.__SetReg(RegLna, 0x07, value)
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elif key == "RssiThresh":
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th = -(value * 2)
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@ -411,6 +406,9 @@ class Rfm69(threading.Thread):
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elif key == "OokFixedThresh":
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self.__WriteReg(RegOokFix, value)
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elif key == "OokPeakThreshDec":
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self.__SetReg(RegOokPeak, 7<<0, value)
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else:
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print("Unrecognized option >>" + key + "<<")
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@ -526,7 +524,7 @@ class Rfm69(threading.Thread):
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self.__SetDioMapping(2, 1) #DIO2 -> DATA
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self.__mutex.acquire()
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while True:
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self.__WriteReg(RegPayloadLength, 0) #unlimited lendth
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self.__WriteReg(RegPayloadLength, 0) #unlimited length
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self.__WriteReg(RegFifoThresh, self.__fifothresh)
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if self.__syncsize > 0:
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self.__SetDioMapping(0, DIO0_PM_SYNC) #DIO0 -> SyncAddress
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@ -547,12 +545,12 @@ class Rfm69(threading.Thread):
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def ReceivePacket(self, length):
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self.__StartRx()
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afc = self.ReadReg(RegAfcMsb) << 8
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afc = afc | self.ReadReg(RegAfcLsb)
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result = self.ReadFifoWait(length)
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rssi = -self.ReadReg(RegRssiValue) / 2
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afc = self.ReadReg(RegAfcMsb) << 8
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afc = afc | self.ReadReg(RegAfcLsb)
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if afc >= 0x8000:
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afc = afc - 0x10000
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