refactoring
This commit is contained in:
Stefan Seegel
parent
7aa238d029
commit
dcbdbeec0b
5 changed files with 209 additions and 159 deletions
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@ -1 +0,0 @@
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from .raspyrfm import *
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@ -1,26 +1,26 @@
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#!/usr/bin/env python2.7
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import RaspyRFM
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from raspyrfm import *
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import sensors
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from sensors import rawsensor
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import sys
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import time
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import threading
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if RaspyRFM.RaspyRFM.Test(1):
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if raspyrfm_test(2, RFM69):
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print("Found RaspyRFM twin")
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rfm = RaspyRFM.RaspyRFM(1, 24) #when using the RaspyRFM twin
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elif RaspyRFM.RaspyRFM.Test(0):
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rfm = RaspyRFM(2, RFM69) #when using the RaspyRFM twin
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elif raspyrfm_test(1, RFM69):
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print("Found RaspyRFM single")
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rfm = RaspyRFM.RaspyRFM() #when using a single single 868 MHz RaspyRFM
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rfm = RaspyRFM(1, RFM69) #when using a single single 868 MHz RaspyRFM
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else:
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print("No RFM69 module found!")
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exit()
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rfm.SetParams(
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rfm.set_params(
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Freq = 868.30, #MHz center frequency
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Datarate = 9.579, #kbit/s baudrate
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ModulationType = RaspyRFM.FSK, #modulation
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ModulationType = rfm69.FSK, #modulation
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Deviation = 30, #kHz frequency deviation
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SyncPattern = [0x2d, 0xd4], #syncword
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Bandwidth = 150, #kHz bandwidth
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@ -40,7 +40,7 @@ class BaudChanger(threading.Thread):
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else:
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dr = 17.241
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print "Switch baudrate to " + str(dr) + " kbit/s"
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rfm.SetParams(Datarate = dr)
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rfm.set_params(Datarate = dr)
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self.baud = not self.baud
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baudChanger = BaudChanger()
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@ -49,7 +49,7 @@ baudChanger.start()
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print "Waiting for sensors..."
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while 1:
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data = rfm.ReceivePacket(5)
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data = rfm.receive_packet(5)
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if data == None:
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continue
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48
raspyrfm/__init__.py
Normal file
48
raspyrfm/__init__.py
Normal file
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@ -0,0 +1,48 @@
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import rfm69
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RFM69 = 1
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RFM9x = 2
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def __get_hw_params(mod):
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if mod == 1:
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dio0 = 25
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elif mod == 2:
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dio0 = 24
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elif mod == 3:
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dio0 = 1
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elif mod == 4:
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dio0 = 18
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else:
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return
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return (mod - 1, dio0)
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def RaspyRFM(mod, type):
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""" Create a RaspyRFM object.
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Parameters:
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mod (int):
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Number of the module.
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Always 1 for a single RaspyRFM
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1-2 for a dual RaspyRFM
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1-4 for a quad RaspyRFM
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type (int):
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type of the module (RFM69 or RFM9x)
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Returns:
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Rfm69 or Rfm9x object if successful, otherwise None
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"""
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s = __get_hw_params(mod)
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if s:
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if type == RFM69:
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return rfm69.Rfm69(s[0], s[1])
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else:
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print("Not yet implemented.")
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def raspyrfm_test(mod, type):
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s = __get_hw_params(mod)
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if s:
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return rfm69.Rfm69.test(s[0], s[1])
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@ -152,15 +152,15 @@ DIO0_PM_SENT = 0
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DIO0_PM_TXDONE = 1
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DIO0_PM_PLLLOCK = 3
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class RaspyRFM(threading.Thread):
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class Rfm69(threading.Thread):
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@staticmethod
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def Test(cs):
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def test(cs, gpio_dio0):
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spi = spidev.SpiDev()
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spi.open(0, cs)
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spi.max_speed_hz = 5000
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#Testing presence of module
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err = False
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for i in range(0, 8):
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for i in range(8):
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spi.xfer2([(RegSyncValue1 + i) | 0x80, 0x55])
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test = spi.xfer2([(RegSyncValue1 + i), 0x00])[1]
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if test != 0x55:
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@ -174,9 +174,8 @@ class RaspyRFM(threading.Thread):
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spi.close()
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return not err
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def __init__(self, cs = 0, gpio_int = 25):
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if not self.Test(cs):
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if not self.test(cs, gpio_int):
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print("ERROR! RFM69 not found")
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return
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@ -192,9 +191,9 @@ class RaspyRFM(threading.Thread):
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print("RFM69 found on CS " + str(cs))
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GPIO.setmode(GPIO.BCM)
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GPIO.setup(gpio_int, GPIO.IN)
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GPIO.add_event_detect(gpio_int, GPIO.RISING, callback=self.__RfmIrq)
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GPIO.add_event_detect(gpio_int, GPIO.RISING, callback=self.__rfm_irq)
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self.__SetMode(MODE_STDBY)
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self.__set_mode(MODE_STDBY)
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config = {}
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#SET DEFAULTS
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@ -256,9 +255,9 @@ class RaspyRFM(threading.Thread):
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config[RegPacketConfig1] = 0x00 #Fixed length, CRC off, no adr
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for key in config:
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self.__WriteReg(key, config[key])
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self.__write_reg(key, config[key])
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self.ModeStandBy()
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self.mode_standby()
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threading.Thread.__init__(self)
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print("Init complete.")
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@ -266,82 +265,82 @@ class RaspyRFM(threading.Thread):
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while True:
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time.sleep(0.5)
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def __RfmIrq(self, ch):
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def __rfm_irq(self, ch):
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self.__event.set()
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def __WriteReg(self, reg, val):
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def __write_reg(self, reg, val):
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temp = self.__spi.xfer2([(reg & 0x7F) | 0x80, val & 0xFF])
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def __WriteRegWord(self, reg, val):
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self.__WriteReg(reg, (val >> 8) & 0xFF)
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self.__WriteReg(reg + 1, val & 0xFF)
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def __write_reg_word(self, reg, val):
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self.__write_reg(reg, (val >> 8) & 0xFF)
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self.__write_reg(reg + 1, val & 0xFF)
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def __SetReg(self, reg, mask, val):
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temp = self.ReadReg(reg) & (~mask)
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def __set_reg(self, reg, mask, val):
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temp = self.read_reg(reg) & (~mask)
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temp |= val & mask
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self.__WriteReg(reg, temp)
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self.__write_reg(reg, temp)
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def __SetDioMapping(self, dio, mapping):
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def __set_dio_mapping(self, dio, mapping):
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if ((dio >= 0) and (dio <=3)):
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self.__SetReg(RegDioMapping1, 0xC0 >> (dio * 2), mapping << (6 - dio * 2))
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self.__set_reg(RegDioMapping1, 0xC0 >> (dio * 2), mapping << (6 - dio * 2))
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elif (dio == 5):
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self.__SetReg(RegDioMapping2, 0x03 << 4, mapping << 4)
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self.__set_reg(RegDioMapping2, 0x03 << 4, mapping << 4)
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def __SetMode(self, mode):
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self.__WriteReg(RegOpMode, mode << 2)
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def __set_mode(self, mode):
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self.__write_reg(RegOpMode, mode << 2)
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self.__mode = mode
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while ((self.ReadReg(RegIrqFlags1) & (1<<7)) == 0):
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while ((self.read_reg(RegIrqFlags1) & (1<<7)) == 0):
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pass
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def ReadReg(self, reg):
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def read_reg(self, reg):
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temp = self.__spi.xfer2([reg & 0x7F, 0x00])
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return temp[1]
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def ReadFifoBurst(self, len):
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def read_fifo_burst(self, len):
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temp = self.__spi.xfer2([0x00] + [0x00] * len)
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return temp[1:]
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def WriteFifoBurst(self, data):
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def write_fifo_burst(self, data):
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self.__spi.xfer2([0x80] + list(data))
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def ReadRegWord(self, reg):
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def read_reg_word(self, reg):
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temp = self.__spi.xfer2([reg & 0x7F, 0x00, 0x00])
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return (temp[1] << 8) | (temp[2])
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def ReadRssiValue(self):
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return self.ReadReg(RegRssiValue)
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def read_rssi_value(self):
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return self.read_reg(RegRssiValue)
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def ModeStandBy(self):
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self.__SetMode(MODE_STDBY)
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def mode_standby(self):
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self.__set_mode(MODE_STDBY)
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def SetParams(self, **params):
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def set_params(self, **params):
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self.__mutex.acquire()
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self.__event.set()
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for key in params:
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value = params[key]
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if key == "Freq":
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fword = int(round(value * 1E6 / FSTEP))
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self.__WriteReg(RegFrfMsb, fword >> 16)
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self.__WriteReg(RegFrfMid, fword >> 8)
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self.__WriteReg(RegFrfLsb, fword)
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self.__write_reg(RegFrfMsb, fword >> 16)
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self.__write_reg(RegFrfMid, fword >> 8)
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self.__write_reg(RegFrfLsb, fword)
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elif key == "TXPower":
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elif key == "TxPower":
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pwr = int(value + 18)
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self.__WriteReg(RegPaLevel, 0x80 | (pwr & 0x1F))
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self.__write_reg(RegPaLevel, 0x80 | (pwr & 0x1F))
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elif key == "Datarate":
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rate = int(round(FXOSC / (value * 1000)))
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self.__WriteRegWord(RegBitrateMsb, rate)
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self.__write_reg_word(RegBitrateMsb, rate)
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elif key == "Deviation":
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dev = int(round(value * 1000 / FSTEP))
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self.__WriteRegWord(RegFdevMsb, dev)
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self.__write_reg_word(RegFdevMsb, dev)
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elif key == "ModulationType":
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self.__SetReg(RegDataModul, 0x18, value << 3)
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self.__set_reg(RegDataModul, 0x18, value << 3)
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elif key == "ModulationsShaping":
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self.__SetReg(RegDataModul, 0x03, value)
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elif key == "ModulationShaping":
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self.__set_reg(RegDataModul, 0x03, value)
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elif key == "SyncPattern":
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conf = 0
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@ -351,9 +350,9 @@ class RaspyRFM(threading.Thread):
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conf |= 1<<7
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else:
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conf = 1<<6
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self.__WriteReg(RegSyncConfig, conf)
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self.__write_reg(RegSyncConfig, conf)
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for i, d in enumerate(value):
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self.__WriteReg(RegSyncValue1 + i, d)
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self.__write_reg(RegSyncValue1 + i, d)
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elif key == "Bandwidth":
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RxBw = FXOSC / value / 1000 / 4
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@ -364,7 +363,7 @@ class RaspyRFM(threading.Thread):
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RxBw = RxBw / 4 - 4
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RxBw = max(RxBw, 0)
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m = int(RxBw)
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self.__SetReg(RegRxBw, 0x1F, m<<3 | e)
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self.__set_reg(RegRxBw, 0x1F, m<<3 | e)
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elif key == "AfcBandwidth":
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RxBw = FXOSC / value / 1000 / 4
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@ -375,46 +374,46 @@ class RaspyRFM(threading.Thread):
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RxBw = RxBw / 4 - 4
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RxBw = max(RxBw, 0)
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m = int(RxBw)
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self.__SetReg(RegAfcBw, 0x1F, m<<3 | e)
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self.__set_reg(RegAfcBw, 0x1F, m<<3 | e)
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elif key == "Preamble":
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self.__WriteRegWord(RegPreambleMsb, value)
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self.__write_reg_word(RegPreambleMsb, value)
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elif key == "LnaGain":
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self.__SetReg(RegLna, 0x07, value)
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self.__set_reg(RegLna, 0x07, value)
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elif key == "RssiThresh":
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th = -(value * 2)
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self.__WriteReg(RegRssiThresh, th)
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self.__write_reg(RegRssiThresh, th)
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elif key == "Dagc":
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self.__WriteReg(RegDagc, value)
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self.__write_reg(RegDagc, value)
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elif key == "AfcFei":
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self.__WriteReg(RegAfcFei, value)
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self.__write_reg(RegAfcFei, value)
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elif key == "Callback":
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self.__Callback = value
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self.__callback = value
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elif key == "DcFree":
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self.__SetReg(RegPacketConfig1, 3<<5, value<<5)
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self.__set_reg(RegPacketConfig1, 3<<5, value<<5)
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elif key == "OokThreshType":
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self.__SetReg(RegOokPeak, 3<<6, value<<6)
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self.__set_reg(RegOokPeak, 3<<6, value<<6)
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elif key == "OokFixedThresh":
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self.__WriteReg(RegOokFix, value)
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self.___write_reg(RegOokFix, value)
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elif key == "OokPeakThreshDec":
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self.__SetReg(RegOokPeak, 7<<0, value)
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self.__set_reg(RegOokPeak, 7<<0, value)
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else:
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print("Unrecognized option >>" + key + "<<")
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self.ModeStandBy();
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self.mode_standby();
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self.__mutex.release()
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def __WaitInt(self):
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def __wait_int(self):
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self.__event.clear()
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if GPIO.input(self.__gpio_int):
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return
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@ -422,7 +421,7 @@ class RaspyRFM(threading.Thread):
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if GPIO.input(self.__gpio_int):
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break
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def WhitenHope(self, data):
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def whiten_hope(self, data):
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lfsr = 0x3fe
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for i, d in enumerate(data):
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data[i] = data[i] ^ ((lfsr >> 2) & 0xFF)
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@ -433,7 +432,7 @@ class RaspyRFM(threading.Thread):
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lfsr <<= 1
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lfsr &= 0x3ff
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def WhitenTI(self, data):
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def whiten_ti(self, data):
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lfsr = 0x1ff
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for i, d in enumerate(data):
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data[i] = data[i] ^ (lfsr & 0xFF)
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@ -442,30 +441,30 @@ class RaspyRFM(threading.Thread):
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lfsr |= 1<<9
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lfsr >>= 1
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def SendPacket(self, data):
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def send_packet(self, data):
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self.__mutex.acquire()
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self.__event.set()
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self.ModeStandBy()
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self.mode_standby()
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#flush FIFO
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status = self.ReadReg(RegIrqFlags2)
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status = self.read_reg(RegIrqFlags2)
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while (status & 0x40 == 0x40):
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self.ReadReg(RegFifo)
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status = self.ReadReg(RegIrqFlags2)
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self.read_reg(RegFifo)
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status = self.read_reg(RegIrqFlags2)
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self.__WriteReg(RegPayloadLength, 0) #unlimited length
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self.__WriteReg(RegFifoThresh, 0x80 | self.__fifothresh) #start TX with 1st byte in FIFO
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self.__SetDioMapping(0, DIO0_PM_SENT) #DIO0 -> PacketSent
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self.__SetMode(MODE_TX)
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self.__write_reg(RegPayloadLength, 0) #unlimited length
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self.__write_reg(RegFifoThresh, 0x80 | self.__fifothresh) #start TX with 1st byte in FIFO
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self.__set_dio_mapping(0, DIO0_PM_SENT) #DIO0 -> PacketSent
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self.__set_mode(MODE_TX)
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l = min(len(data), 64)
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while True:
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self.WriteFifoBurst(data[:l])
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self.write_fifo_burst(data[:l])
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data = data[l:]
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if len(data) == 0:
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break
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while True:
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status = self.ReadReg(RegIrqFlags2)
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status = self.read_reg(RegIrqFlags2)
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if (status & (1<<5)) == 0: #below fifothresh
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l = min(len(data), self.__fifothresh)
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break
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@ -473,38 +472,38 @@ class RaspyRFM(threading.Thread):
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l = 1
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break
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self.__WaitInt()
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self.ModeStandBy()
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self.__wait_int()
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self.mode_standby()
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self.__mutex.release()
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def ReadFifoWait(self, length):
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def read_fifo_wait(self, length):
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ret = []
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while length > 0:
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flags = self.ReadReg(RegIrqFlags2)
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flags = self.read_reg(RegIrqFlags2)
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if ((flags & (1<<5)) != 0) and (length >= 32): #FIFO level?
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ret += self.ReadFifoBurst(self.__fifothresh)
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ret += self.read_fifo_burst(self.__fifothresh)
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length -= self.__fifothresh
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if (flags & (1<<6)) != 0: #FIFO not empty?
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ret.append(self.ReadReg(RegFifo))
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ret.append(self.read_reg(RegFifo))
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length -= 1
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return ret
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|
||||
def GetNoiseFloor(self):
|
||||
self.__mutex.acquire()
|
||||
#save values
|
||||
rssithresh = self.ReadReg(RegRssiThresh)
|
||||
ookthresh = self.ReadReg(RegOokFix)
|
||||
sync = self.ReadReg(RegSyncConfig)
|
||||
rssithresh = self.read_reg(RegRssiThresh)
|
||||
ookthresh = self.read_reg(RegOokFix)
|
||||
sync = self.read_reg(RegSyncConfig)
|
||||
|
||||
self.__WriteReg(RegRssiThresh, 240)
|
||||
self.__WriteReg(RegSyncConfig, 1<<6) #no sync, always fill FIFO
|
||||
self.__WriteReg(RegPayloadLength, 0) #unlimited length
|
||||
self.__SetMode(MODE_RX)
|
||||
self.__write_reg(RegRssiThresh, 240)
|
||||
self.__write_reg(RegSyncConfig, 1<<6) #no sync, always fill FIFO
|
||||
self.__write_reg(RegPayloadLength, 0) #unlimited length
|
||||
self.__set_mode(MODE_RX)
|
||||
thresh = 40
|
||||
while True:
|
||||
self.__WriteReg(RegOokFix, thresh)
|
||||
self.__write_reg(RegOokFix, thresh)
|
||||
for i in range(150):
|
||||
b = self.ReadFifoWait()
|
||||
b = self.read_fifo_wait()
|
||||
if b != 0:
|
||||
thresh += 1
|
||||
break;
|
||||
|
|
@ -512,47 +511,46 @@ class RaspyRFM(threading.Thread):
|
|||
break;
|
||||
|
||||
#restore registers
|
||||
self.__WriteReg(RegRssiThresh, rssithresh)
|
||||
self.__WriteReg(RegOokFix, ookthresh)
|
||||
self.__WriteReg(RegSyncConfig, sync)
|
||||
self.ModeStandBy()
|
||||
self.__write_reg(RegRssiThresh, rssithresh)
|
||||
self.__write_reg(RegOokFix, ookthresh)
|
||||
self.__write_reg(RegSyncConfig, sync)
|
||||
self.mode_standby()
|
||||
self.__mutex.release()
|
||||
return thresh
|
||||
|
||||
def __StartRx(self):
|
||||
self.__SetDioMapping(2, 1) #DIO2 -> DATA
|
||||
def __start_rx(self):
|
||||
self.__mutex.acquire()
|
||||
while True:
|
||||
self.__WriteReg(RegPayloadLength, 0) #unlimited length
|
||||
self.__WriteReg(RegFifoThresh, self.__fifothresh)
|
||||
self.__write_reg(RegPayloadLength, 0) #unlimited length
|
||||
self.__write_reg(RegFifoThresh, self.__fifothresh)
|
||||
if self.__syncsize > 0:
|
||||
self.__SetDioMapping(0, DIO0_PM_SYNC) #DIO0 -> SyncAddress
|
||||
self.__set_dio_mapping(0, DIO0_PM_SYNC) #DIO0 -> SyncAddress
|
||||
else:
|
||||
self.__SetDioMapping(0, DIO0_PM_RSSI) #DIO0 -> RSSI
|
||||
self.__SetMode(MODE_RX)
|
||||
self.__set_dio_mapping(0, DIO0_PM_RSSI) #DIO0 -> RSSI
|
||||
self.__set_mode(MODE_RX)
|
||||
self.__mutex.release()
|
||||
self.__WaitInt()
|
||||
self.__wait_int()
|
||||
self.__mutex.acquire()
|
||||
if self.__mode == MODE_RX:
|
||||
break;
|
||||
|
||||
def StartRx(self, cb):
|
||||
self.__StartRx()
|
||||
def start_rx(self, cb):
|
||||
self.__start_rx()
|
||||
cb()
|
||||
self.ModeStandBy()
|
||||
self.mode_standby()
|
||||
self.__mutex.release()
|
||||
|
||||
def ReceivePacket(self, length):
|
||||
self.__StartRx()
|
||||
result = self.ReadFifoWait(length)
|
||||
def receive_packet(self, length):
|
||||
self.__start_rx()
|
||||
result = self.read_fifo_wait(length)
|
||||
|
||||
rssi = -self.ReadReg(RegRssiValue) / 2
|
||||
afc = self.ReadReg(RegAfcMsb) << 8
|
||||
afc = afc | self.ReadReg(RegAfcLsb)
|
||||
rssi = -self.read_reg(RegRssiValue) / 2
|
||||
afc = self.read_reg(RegAfcMsb) << 8
|
||||
afc = afc | self.read_reg(RegAfcLsb)
|
||||
|
||||
if afc >= 0x8000:
|
||||
afc = afc - 0x10000
|
||||
|
||||
self.ModeStandBy()
|
||||
self.mode_standby()
|
||||
self.__mutex.release()
|
||||
return (result, rssi, afc)
|
||||
11
setup.py
11
setup.py
|
|
@ -2,12 +2,17 @@
|
|||
import setuptools
|
||||
|
||||
setuptools.setup(
|
||||
name="RaspyRFM",
|
||||
name="raspyrfm",
|
||||
version="1.1",
|
||||
author="S. Seegel",
|
||||
author_email="post@seegel-systeme.de",
|
||||
description="Package for interfacing the RaspyRFM module",
|
||||
packages=["RaspyRFM"],
|
||||
keywords="RFM69 radio IOT wireless remote hope",
|
||||
description="Package for interfacing the RaspyRFM radiomodule",
|
||||
url="https://github.com/Phunkafizer/RaspyRFM",
|
||||
project_urls={
|
||||
"Examples": "https://www.seegel-systeme.de/2015/09/02/ein-funkmodul-fuer-den-raspberry-raspyrfm/"
|
||||
},
|
||||
packages=["raspyrfm"],
|
||||
license="MIT",
|
||||
zip_safe=False,
|
||||
install_requires=[
|
||||
|
|
|
|||
Loading…
Reference in a new issue